Patents/Inventors

Jiangang Wu

Milpitas, CAUS37 patents

36 Patents

US125413272026
Storing Sequential and Random Data in Different Layouts
Micron Technology, Inc.
0 cites
US123327422025
Memory Compaction Management in Memory Devices
Micron Technology, Inc.
0 cites
US123145822025
Performance Control for a Memory Sub-system
Micron Technology, Inc.
0 cites
US122993042025
Automatic Wordline Status Bypass Management
Micron Technology, Inc.
0 cites
US122294522025
Read Counter for Quality of Service Design
Micron Technology, Inc.
0 cites
US121820132024
Memory Sub-system Write Sequence Track
Micron Technology, Inc.
0 cites
US121648042024
Memory Sub-system Media Management Groups
Micron Technology, Inc.
0 cites
US121484842024
Memory Sub-system Scan
Micron Technology, Inc.
0 cites
US120571852024
Voltage Calibration Scans to Reduce Memory Device Overhead
Micron Technology, Inc.
0 cites
US120352232024
Method and Device for Wireless Transmission
ESPRESSIF SYSTEMS (SHANGHAI) CO., Ltd.
0 cites
US120263852024
Automatic Wordline Status Bypass Management
Micron Technology, Inc.
0 cites
US120013402024
Full Multi-plane Operation Enablement
Micron Technology, Inc.
0 cites
US119953262024
Selective Partitioning of Sets of Pages Programmed to Memory Device
Micron Technology, Inc.
0 cites
US119342662024
Memory Compaction Management in Memory Devices
Micron Technology, Inc.
0 cites
US119283472024
Managing Voltage Bin Selection for Blocks of a Memory Device
Micron Technology, Inc.
0 cites
US119157852024
Memory Sub-system Management Based on Dynamic Control of Wordline Start Voltage
Micron Technology, Inc.
0 cites
US118999482024
Performance Control for a Memory Sub-system
Micron Technology, Inc.
0 cites
US118863362024
Managing Workload of Programming Sets of Pages to Memory Device
Micron Technology, Inc.
0 cites
US118682022024
Granular Error Reporting on Multi-pass Programming of Non-volatile Memory
Micron Technology, Inc.
0 cites
US118470512023
Memory Sub-system Logical Block Address Remapping
Micron Technology, Inc.
0 cites
US118470652023
Memory Sub-system Management of Firmware Block Record and Device Block Record
Micron Technology, Inc.
0 cites
US118417942023
Memory Sub-system Write Sequence Track
Micron Technology, Inc.
0 cites
US118237482023
Voltage Bin Calibration Based on a Temporary Voltage Shift Offset
Micron Technology, Inc.
0 cites
US117839012023
Multi-tier Threshold Voltage Offset Bin Calibration
Micron Technology, Inc.
0 cites
US117566262023
Memory Die Resource Management
Micron Technology, Inc.
0 cites
US117480132023
Grouping Blocks Based on Power Cycle and Power on Time
Micron Technology, Inc.
0 cites
US117117492023
Method and Device for Wireless Transmission
ESPRESSIF SYSTEMS (SHANGHAI) CO., Ltd.
0 cites
US116988642023
Memory Access Collision Management on a Shared Wordline
Micron Technology, Inc.
0 cites
US116937682023
Power Loss Data Protection in a Memory Sub-system
Micron Technology, Inc.
0 cites
US116937742023
Selectively Utilizing a Read Page Cache Mode in a Memory Subsystem
MICRON TECHNOLOGY, Inc.
0 cites
US116766642023
Voltage Bin Selection for Blocks of a Memory Device After Power Up of the Memory Device
Micron Technology, Inc.
0 cites
US116449792023
Selective Accelerated Sampling of Failure- Sensitive Memory Pages
Micron Technology, Inc.
0 cites
US116150292023
Full Multi-plane Operation Enablement
Micron Technology, Inc.
0 cites
US116098462023
Managing Workload of Programming Sets of Pages to Memory Device
Micron Technology, Inc.
0 cites
US115930052023
Managing Voltage Bin Selection for Blocks of a Memory Device
Micron Technology, Inc.
0 cites
US115876392023
Voltage Calibration Scans to Reduce Memory Device Overhead
Micron Technology, Inc.
0 cites