Patents/Inventors

Javier A. Delacruz

San Jose, CAUS53 patents

53 Patents

US125640842026
Bonded Structures Without Intervening Adhesive
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US125576592026
Wire Bonding Method and Apparatus for Electromagnetic Interference Shielding
Adeia Semiconductor Technologies LLC
0 cites
US125002092025
Embedded Organic Interposer for High Bandwidth
Adeia Semiconductor Technologies LLC
0 cites
US124514392025
Bonded Structure Including an Obstructive Element Directly Bonded to a Semiconductor Element Without an Adhesive
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US124514452025
Protective Elements for Bonded Structures
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US124314492025
Circuitry for Electrical Redundancy in Bonded Structures
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US123621822025
Direct-bonded Native Interconnects and Active Base Die
Adeia Semiconductor Inc.
0 cites
US123083322025
Circuitry for Electrical Redundancy in Bonded Structures
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US122931082025
3D Memory Circuit
Adeia Semiconductor Technologies LLC
0 cites
US122939932025
3D Chip Sharing Data Bus
Adeia Semiconductor Inc.
0 cites
US122887712025
Apparatus for Non-volatile Random Access Memory Stacks
Adeia Semiconductor Technologies LLC
0 cites
US122835722025
Symbiotic Network on Layers
Adeia Semiconductor Technologies LLC
0 cites
US122782152025
Integrated Voltage Regulator and Passive Components
Adeia Semiconductor Inc.
0 cites
US122710322025
Integrated Optical Waveguides, Direct-bonded Waveguide Interface Joints, Optical Routing and Interconnects
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US122727302025
Transistor Level Interconnection Methodologies Utilizing 3D Interconnects
Adeia Semiconductor Inc.
0 cites
US122551762025
Scalable Architecture for Reduced Cycles Across SOC
Adeia Semiconductor Technologies LLC
0 cites
US122180592025
Stacked IC Structure with Orthogonal Interconnect Layers
Adeia Semiconductor Inc.
0 cites
US121742462024
Security Circuitry for Bonded Structures
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US121763032024
Wafer-level Bonding of Obstructive Elements
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US121548582024
Connecting Multiple Chips Using an Interconnect Device
Invensas LLC
0 cites
US121425282024
3D Chip with Shared Clock Distribution Network
Adeia Semiconductor Inc.
0 cites
US121130542024
Non-volatile Dynamic Random Access Memory
Adeia Semiconductor Technologies LLC
0 cites
US121006842024
Bonded Structures
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US120948352024
Wire Bonding Method and Apparatus for Electromagnetic Interference Shielding
Adeia Semiconductor Technologies LLC
0 cites
US120806722024
Direct Gang Bonding Methods Including Directly Bonding First Element to Second Element to Form Bonded Structure Without Adhesive
ADEIA Semiconductor Bonding Technologies Inc.
0 cites
US120740922024
Hard IP Blocks with Physically Bidirectional Passageways
Adeia Semiconductor Inc.
0 cites
US120573832024
Bonded Structures with Integrated Passive Component
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US119675752024
Bond Enhancement Structure in Microelectronics for Trapping Contaminants During Direct-bonding Processes
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US119293472024
Mixed Exposure for Large Die
ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
0 cites
US119160762024
Device Disaggregation for Improved Performance
Adeia Semiconductor Inc.
0 cites
US119012812024
Bonded Structures with Integrated Passive Component
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US118943452024
Integrated Voltage Regulator and Passive Components
Adeia Semiconductor Inc.
0 cites
US118814542024
Stacked IC Structure with Orthogonal Interconnect Layers
Adeia Semiconductor Inc.
0 cites
US118760762024
Apparatus for Non-volatile Random Access Memory Stacks
Adeia Semiconductor Technologies LLC
0 cites
US118604152024
Integrated Optical Waveguides, Direct-bonded Waveguide Interface Joints, Optical Routing and Interconnects
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US118626022024
Scalable Architecture for Reduced Cycles Across SOC
ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
0 cites
US118626042024
Systems and Methods for Releveled Bump Planes for Chiplets
Adeia Semiconductor Inc.
0 cites
US118482842023
Protective Elements for Bonded Structures
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US118375562023
Wire Bonding Method and Apparatus for Electromagnetic Interference Shielding
Adeia Semiconductor Technologies LLC
0 cites
US118308042023
Over and Under Interconnects
Invensas LLC
0 cites
US118239062023
Direct-bonded Native Interconnects and Active Base Die
Xcelsis Corporation
0 cites
US118240422023
3D Chip Sharing Data Bus
Xcelsis Corporation
0 cites
US118240462023
Symbiotic Network on Layers
Invensas LLC
0 cites
US118174092023
Directly Bonded Structures Without Intervening Adhesive and Methods for Forming the Same
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US118044692023
Active Bridging Apparatus
Invensas LLC
0 cites
US117282872023
Wafer-level Bonding of Obstructive Elements
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US117216532023
Circuitry for Electrical Redundancy in Bonded Structures
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US116887762023
Transistor Level Interconnection Methodologies Utilizing 3D Interconnects
Adeia Semiconductor Inc.
0 cites
US116706152023
Bonded Structures
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US116263632023
Bonded Structures with Integrated Passive Component
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites
US116108462023
Protective Elements for Bonded Structures Including an Obstructive Element
Adeia Semiconductor Bonding Technologies Inc.
0 cites
US115992992023
3D Memory Circuit
Invensas LLC
0 cites
US116005422023
Cavity Packages
ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.
0 cites