8 Patents
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- US122782052025Semiconductor Device Package with Improved Die Pad and Solder Mask Design
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0 cites - US122665972025Multilevel Package Substrate with Stair Shaped Substrate Traces
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0 cites - US122438352025Package Substrate with CTE Matching Barrier Ring Around Microvias
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- US118043822023Method of Forming Package Substrate with Partially Recessed Capacitor
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