Patents/Inventors

Ian P. Shaeffer

Los Gatos, CAUS11 patents

12 Patents

US123951732025
Integrated Circuit That Applies Different Data Interface Terminations During and After Write Data Reception
Rambus Inc.
0 cites
US122493922025
Memory Controller with Staggered Request Signal Output
Rambus Inc.
0 cites
US121895482025
Buffer IC with Asymmetric Memory Module Interfaces
Rambus Inc.
0 cites
US121909902025
Deferred Fractional Memory Row Activation
Rambus Inc.
0 cites
US120669582024
Clock Generation for Timing Communications with Ranks of Memory Devices
RAMBUS Inc.
0 cites
US120559842024
Computer in an Input Device
APPLE Inc.
0 cites
US118305732023
Memory Controller with Staggered Request Signal Output
Rambus Inc.
0 cites
US118042502023
Memory with Deferred Fractional Row Activation
Rambus Inc.
0 cites
US117909622023
Strobe Acquisition and Tracking
RAMBUS Inc.
0 cites
US117410412023
Interface Bus Resource Allocation
APPLE Inc.
0 cites
US116368012023
Computer Console for Throttling the Video Bitrate of Video Streams to Interface with an Electronic Device
Apple Inc.
0 cites
US116307882023
Clock Generation for Timing Communications with Ranks of Memory Devices
RAMBUS Inc.
0 cites