20 Patents
- US125504012026Doped STI to Reduce Source/drain Diffusion for Germanium NMOS Transistors
Intel Corporation
0 cites - US124329642025Co-integrated Gallium Nitride (gan) and Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuit Technology
Intel Corporation
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- US123425742025Contact Resistance Reduction in Transistor Devices with Metallization on Both Sides
Intel Corporation
0 cites - US122726882025Selective Growth Self-aligned Gate Endcap (SAGE) Architectures Without Fin End Gap
Intel Corporation
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- US121661242024Gate-all-around Integrated Circuit Structures Having Germanium-doped Nanoribbon Channel Structures
Intel Corporation
0 cites - US121193872024Low Resistance Approaches for Fabricating Contacts and the Resulting Structures
Intel Corporation
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- US120466002024Techniques for Achieving Multiple Transistor Fin Dimensions on a Single Die
Intel Corporation
0 cites - 0 cites
- US120210812024Techniques for Achieving Multiple Transistor Fin Dimensions on a Single Die
Intel Corporation
0 cites - 0 cites
- US117642752023Indium-containing Fin of a Transistor Device with an Indium-rich Core
Intel Corporation
0 cites - 0 cites
- US117356702023Non-selective Epitaxial Source/drain Deposition to Reduce Dopant Diffusion for Germanium NMOS Transistors
Intel Corporation
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- US115814062023Method of Fabricating CMOS Finfets by Selectively Etching a Strained Sige Layer
Daedalus Prime LLC
0 cites