96 Patents
- US125987772026Low Temperature, High Germanium, High Boron Sige:b Pepi with Titanium Silicide Contacts for Ultra-low PMOS Contact Resistivity and Thermal Stability
Intel Corporation
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- US125751702026Low Temperature, High Germanium, High Boron Sige:b Pepi with a Silicon Rich Capping Layer for Ultra-low PMOS Contact Resistivity and Thermal Stability
Intel Corporation
0 cites - US125751842026CMOS Architecture with Thermally Stable Silicide Gate Workfunction Metal
Intel Corporation
0 cites - US125686442026Contact Over Active Gate Structures with Trench Contact Layers for Advanced Integrated Circuit Structure Fabrication
Intel Corporation
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- US125433512026Enriched Semiconductor Nanoribbons for Producing Intrinsic Compressive Strain
INTEL CORPORATION
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- US124396692025Co-deposition of Titanium and Silicon for Improved Silicon Germanium Source and Drain Contacts
Intel Corporation
0 cites - US124263422025Low Germanium, High Boron Silicon Rich Capping Layer for PMOS Contact Resistance Thermal Stability
Intel Corporation
0 cites - US124143392025Formation of Gate Spacers for Strained PMOS Gate-all-around Transistor Structures
Intel Corporation
0 cites - US123880112025Top Gate Recessed Channel CMOS Thin Film Transistor and Methods of Fabrication
Intel Corporation
0 cites - US123693992025Gate-to-gate Isolation for Stacked Transistor Architecture via Selective Dielectric Deposition Structure
INTEL CORPORATION
0 cites - US123494162025Transistor Structures with a Metal Oxide Contact Buffer and a Method of Fabricating the Transistor Structures
Intel Corporation
0 cites - US123425742025Contact Resistance Reduction in Transistor Devices with Metallization on Both Sides
Intel Corporation
0 cites - US123289272025Low Resistance and Reduced Reactivity Approaches for Fabricating Contacts and the Resulting Structures
Intel Coporation
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- US122551372025Sideways Vias in Isolation Areas to Contact Interior Layers in Stacked Devices
Intel Corporation
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- US121837392024Ribbon or Wire Transistor Stack with Selective Dipole Threshold Voltage Shifter
Intel Corporation
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- US121193872024Low Resistance Approaches for Fabricating Contacts and the Resulting Structures
Intel Corporation
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- US121208652024Arrays of Double-sided Dram Cells Including Capacitors on the Frontside and Backside of a Stacked Transistor Structure
Intel Corporation
0 cites - US121070852024Interconnect Techniques for Electrically Connecting Source/drain Regions of Stacked Transistors
Intel Corporation
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- US120683192024High Performance Semiconductor Oxide Material Channel Regions for NMOS
Intel Corporation
0 cites - US120338962024Isolation Wall Stressor Structures to Improve Channel Stress and Their Methods of Fabrication
Intel Corporation
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- US119964042024Three-dimensional Integrated Circuits (3dics) Including Bottom Gate MOS Transistors with Monocrystalline Channel Material
Intel Corporation
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- US119964472024Field Effect Transistors with Gate Electrode Self-aligned to Semiconductor Fin
Intel Corporation
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- US119424162024Sideways Vias in Isolation Areas to Contact Interior Layers in Stacked Devices
Intel Corporation
0 cites - US119358912024Non-silicon N-type and P-type Stacked Transistors for Integrated Circuit Devices
Intel Corporation
0 cites - US119293202024Top Gate Recessed Channel CMOS Thin Film Transistor in the Back End of Line and Methods of Fabrication
Intel Corporation
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- US118943722024Stacked Trigate Transistors with Dielectric Isolation and Process for Forming Such
Intel Corporation
0 cites - US118944652024Deep Gate-all-around Semiconductor Device Having Germanium or Group III-V Active Layer
Google LLC
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- US118698942024Metallization Structures for Stacked Device Connectivity and Their Methods of Fabrication
Intel Corporation
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- US118430582023Transistor Structures with a Metal Oxide Contact Buffer and a Method of Fabricating the Transistor Structures
Intel Corporation
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- US118309332023Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Bottom-up Oxidation Approach
Intel Corporation
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- US117768982023Sidewall Interconnect Metallization Structures for Integrated Circuit Devices
Intel Corporation
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- US117642632023Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Multiple Bottom-up Oxidation Approaches
Intel Corporation
0 cites - US117642752023Indium-containing Fin of a Transistor Device with an Indium-rich Core
Intel Corporation
0 cites - US117642822023Antiferroelectric Gate Dielectric Transistors and Their Methods of Fabrication
Intel Corporation
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- US117569982023Source-channel Junction for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites - US117423462023Interconnect Techniques for Electrically Connecting Source/drain Regions of Stacked Transistors
Intel Corporation
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- US116997042023Monolithic Integration of a Thin Film Transistor Over a Complimentary Transistor
INTEL CORPORATION
0 cites - US116950812023Channel Layer Formation for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites - US116706822023FINFET Transistor Having a Doped Sub Fin Structure to Reduce Channel to Substrate Leakage
Tahoe Research, Ltd.
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- US116526062023Advanced Encryption Standard Semiconductor Devices Fabricated on a Stacked-substrate
Intel Corporation
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- US116409612023III-V Source/drain in Top NMOS Transistors for Low Temperature Stacked Transistor Contacts
Intel Corporation
0 cites - US116317372023Ingaas Epi Structure and Wet Etch Process for Enabling Iii-v GAA in Art Trench
Intel Corporation
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- US116160602023Techniques for Forming Gate Structures for Transistors Arranged in a Stacked Configuration on a Single Fin Structure
Intel Corporation
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- US115945332023Stacked Trigate Transistors with Dielectric Isolation Between First and Second Semiconductor Fins
Intel Corporation
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- US115576582023Transistors with High Density Channel Semiconductor Over Dielectric Material
Intel Corporation
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