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Gerrit J. Leusink
Rexford, NY
US
3 patents
4 Patents
US12341053
2025
System for Backside Deposition of a Substrate
Tokyo Electron Limited
0 cites
US12237216
2025
Method for Filling Recessed Features in Semiconductor Devices with a Low-resistivity Metal
Tokyo Electron Limited
0 cites
US11908728
2024
System for Backside Deposition of a Substrate
Tokyo Electron Limited
0 cites
US11894240
2024
Semiconductor Processing Systems with In-situ Electrical Bias
TOKYO ELECTRON LIMITED
0 cites