Patents/Inventors

Gerald S. Pasdast

San Jose, CAUS18 patents

11 Patents

US126223172026
Packaging Architecture for Modular Die Interoperability
Intel Corporation
0 cites
US125990332026
Quasi-monolithic Integrated Packaging Architecture with Mid-die Serializer/deserializer
Intel Corporation
0 cites
US125819682026
Package Architecture of Large Dies Using Quasi-monolithic Chip Layers
Intel Corporation
0 cites
US124698202025
Fine-grained Disaggregated Server Architecture
Intel Corporation
0 cites
US124069622025
Power Delivery Through Capacitor-dies in a Multi-layered Microelectronic Assembly
Intel Corporation
0 cites
US123163432025
Phy-based Retry Techniques for Die-to-die Interfaces
Intel Corporation
0 cites
US122666822025
Capacitors and Resistors at Direct Bonding Interfaces in Microelectronic Assemblies
Intel Corporation
0 cites
US121179602024
Approximate Data Bus Inversion Technique for Latency Sensitive Applications
Intel Corporation
0 cites
US121070602024
Microelectronic Assemblies with Inductors in Direct Bonding Regions
Intel Corproation
0 cites
US120626312024
Microelectronic Assemblies with Inductors in Direct Bonding Regions
Intel Corporation
0 cites
US115812822023
Serializer-deserializer Die for High Speed Signal Interconnect
Intel Corporation
0 cites