Patents/Inventors

Georg Seidemann

LandshutDE26 patents

24 Patents

US125819292026
Semiconductor Devices and Methods for Forming a Semiconductor Device
Intel Corporation
0 cites
US125686632026
Threshold Voltage Tuning for Nanoribbon-based Transistors
Intel Corporation
0 cites
US125387972026
Substrate for Improved Heat Dissipation and Method
Intel Corporation
0 cites
US124761762025
Glass Core Substrate Printed Circuit Board for Warpage Reduction
Intel Corporation
0 cites
US124396162025
Integrated Circuit Package Redistribution Layers with Metal-insulator-metal (MIM) Capacitors
Intel Corporation
0 cites
US124314242025
Buried Power Rails Integrated with Decoupling Capacitance
Intel Corporation
0 cites
US124069252025
Bare-die Smart Bridge Connected with Copper Pillars for System-in-package Apparatus
Intel Corporation
0 cites
US123947262025
Method to Implement Wafer-level Chip-scale Packages with Grounded Conformal Shield
Intel Corporation
0 cites
US123827122025
Semiconductor Dies and Devices with Frontside and Backside Coils for Inductive Coupling
Intel Corporation
0 cites
US123746252025
Microelectronic Assemblies Having Topside Power Delivery Structures
Intel Corporation
0 cites
US123477962025
Semiconductor Dies and Devices with a Coil for Inductive Coupling
Intel Corporation
0 cites
US123410962025
Bare-die Smart Bridge Connected with Copper Pillars for System-in-package Apparatus
Intel Corporation
0 cites
US122495532025
Thermal Contacts at Periphery of Integrated Circuit Packages
Intel Corporation
0 cites
US122438282025
Microelectronic Assemblies Having Topside Power Delivery Structures
Intel Corporation
0 cites
US122438562025
Fan Out Packaging Pop Mechanical Attach Method
Intel Corporation
0 cites
US122117962025
Microelectronic Assemblies Having Topside Power Delivery Structures
Intel Corporation
0 cites
US121915712025
Antenna with Graded Dielectirc and Method of Making the Same
Intel Corporation
0 cites
US121258152024
Assembly of 2XD Module Using High Density Interconnect Bridges
Intel Corporation
0 cites
US120806552024
Method to Implement Wafer-level Chip-scale Packages with Grounded Conformal Shield
Intel Corporation
0 cites
US120574112024
Stress Relief Die Implementation
Intel Corporation
0 cites
US119554622024
Package Stacking Using Chip to Wafer Bonding
Intel Corporation
0 cites
US118774032024
Printed Wiring-board Islands for Connecting Chip Packages and Methods of Assembling Same
Intel Corporation
0 cites
US117641872023
Semiconductor Packages, and Methods for Forming Semiconductor Packages
Intel Corporation
0 cites
US117355702023
Fan Out Packaging Pop Mechanical Attach Method
Intel Corporation
0 cites