Daniel Mark Dreps

7 Patents

• US125005812025

  Multi-phase Clock Generation Circuit with Digital Calibration

  International Business Machines Corporation

  0 cites
• US122665982025

  Dense via Pitch Interconnect to Increase Wiring Density

  International Business Machines Corporation

  0 cites
• US121769602024

  Communication Systems for Power Supply Noise Reduction

  International Business Machines Corporation

  0 cites
• US120958912024

  Communication Systems for Power Supply Noise Reduction

  International Business Machines Corporation

  0 cites
• US119794802024

  Quadrature Circuit Interconnect Architecture with Clock Forwarding

  International Business Machines Corporation

  0 cites
• US119736302024

  Calibrating a Quadrature Receive Serial Interface

  International Business Machines Corporation

  0 cites
• US118048282023

  Dual Duty Cycle Correction Loop for a Serializer/deserializer (serdes) Transmitter Output

  International Business Machines Corporation

  0 cites