51 Patents
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Intel Corporation
0 cites - US125503732026Selective Removal of Channel Bodies in Stacked Gate-all-around (GAA) Device Structures
INTEL CORPORATION
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Intel Corporation
0 cites - US123880112025Top Gate Recessed Channel CMOS Thin Film Transistor and Methods of Fabrication
Intel Corporation
0 cites - US123693992025Gate-to-gate Isolation for Stacked Transistor Architecture via Selective Dielectric Deposition Structure
INTEL CORPORATION
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Intel Corporation
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Intel Corporation
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- US121208652024Arrays of Double-sided Dram Cells Including Capacitors on the Frontside and Backside of a Stacked Transistor Structure
Intel Corporation
0 cites - US121070852024Interconnect Techniques for Electrically Connecting Source/drain Regions of Stacked Transistors
Intel Corporation
0 cites - US120683192024High Performance Semiconductor Oxide Material Channel Regions for NMOS
Intel Corporation
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Intel Corporation
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- US119424162024Sideways Vias in Isolation Areas to Contact Interior Layers in Stacked Devices
Intel Corporation
0 cites - US119358912024Non-silicon N-type and P-type Stacked Transistors for Integrated Circuit Devices
Intel Corporation
0 cites - US119293202024Top Gate Recessed Channel CMOS Thin Film Transistor in the Back End of Line and Methods of Fabrication
Intel Corporation
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- US118943722024Stacked Trigate Transistors with Dielectric Isolation and Process for Forming Such
Intel Corporation
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- US118626362024Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Selective Bottom-up Approach
Intel Corporation
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- US118309332023Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Bottom-up Oxidation Approach
Intel Corporation
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- US117642632023Gate-all-around Integrated Circuit Structures Having Depopulated Channel Structures Using Multiple Bottom-up Oxidation Approaches
Intel Corporation
0 cites - US117569982023Source-channel Junction for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites - US117423462023Interconnect Techniques for Electrically Connecting Source/drain Regions of Stacked Transistors
Intel Corporation
0 cites - US116950812023Channel Layer Formation for III-V Metal-oxide-semiconductor Field Effect Transistors (mosfets)
Intel Corporation
0 cites - US116769662023Stacked Transistors Having Device Strata with Different Channel Widths
Intel Corporation
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- US116409612023III-V Source/drain in Top NMOS Transistors for Low Temperature Stacked Transistor Contacts
Intel Corporation
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- US115945332023Stacked Trigate Transistors with Dielectric Isolation Between First and Second Semiconductor Fins
Intel Corporation
0 cites - US115737982023Stacked Transistors with Different Gate Lengths in Different Device Strata
Intel Corporation
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- US115576582023Transistors with High Density Channel Semiconductor Over Dielectric Material
Intel Corporation
0 cites - US115521042023Stacked Transistors with Dielectric Between Channels of Different Device Strata
Intel Corporation
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