20 Patents
- US124388292025System and Method for Deadlock Detection in Network-on-chip (noc) Having External Dependencies
ARTERIS, Inc.
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- US123800552025System and Method for Performing Transaction Aggregation in a Network-on-chip (noc)
ARTERIS, Inc.
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- US122893842025System and Method for Synthesis of Connectivity to an Interconnect in a Multi-protocol System-on-chip (soc)
ARTERIS, Inc.
0 cites - 0 cites
- US122048332025System and Method to Generate a Network-on-chip (noc) Description Using Incremental Topology Synthesis
ARTERIS, Inc.
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- US117485352023System and Method to Generate a Network-on-chip (noc) Description Using Incremental Topology Synthesis
ARTERIS, Inc.
0 cites - US116657762023System and Method for Synthesis of a Network-on-chip for Deadlock-free Transformation
ARTERIS, Inc.
0 cites - 0 cites
- US116013572023System and Method for Generation of Quality Metrics for Optimization Tasks in Topology Synthesis of a Network
ARTERIS, Inc.
0 cites - US115582592023System and Method for Generating and Using Physical Roadmaps in Network Synthesis
ARTERIS, Inc.
0 cites