Baosuo Zhou

3 Patents

• US124630442025

  Pitch Reduction Technology Using Alternating Spacer Depositions During the Formation of a Semiconductor Device and Systems Including Same

  0 cites
• US121208782024

  Block-to-block Isolation and Deep Contact Using Pillars in a Memory Array

  Intel Corporation

  0 cites
• US119357562024

  Pitch Reduction Technology Using Alternating Spacer Depositions During the Formation of a Semiconductor Device and Systems Including Same

  0 cites