Patents/Inventors

Azalia Mirhoseini

Mountain View, CAUS14 patents

14 Patents

US125546752026
Synthesizing Zero-loss Low-power Approximate DNN Accelerators with Large-scale Search
Google LLC
0 cites
US124881642025
Alignment Cost for Integrated Circuit Placement
Google LLC
0 cites
US124617232025
Learned Graph Optimizations for Compilers
Google LLC
0 cites
US122487452025
Generating Integrated Circuit Placements Using Neural Networks
Google LLC
0 cites
US122050382025
Computational Graph Optimization
Google LLC
0 cites
US120865162024
Generating Integrated Circuit Floorplans Using Neural Networks
Google LLC
0 cites
US120674762024
Mixture of Experts Neural Networks
Google LLC
0 cites
US119223132024
Partitioned Machine Learning Architecture
WILLIAM MARSH RICE UNIVERSITY
0 cites
US118536772023
Generating Integrated Circuit Placements Using Neural Networks
Google LLC
0 cites
US118037472023
Device Placement Optimization with Reinforcement Learning
Google LLC
0 cites
US117902142023
Mixture of Experts Neural Networks
Google LLC
0 cites
US116759402023
Generating Integrated Circuit Floorplans Using Neural Networks
Google LLC
0 cites
US116572892023
Computational Graph Optimization
Google LLC
0 cites
US115566902023
Generating Integrated Circuit Placements Using Neural Networks
Google LLC
0 cites