Patents/Inventors

Avinash Sodani

San Jose, CAUS21 patents

24 Patents

US122929782025
System and Method for SRAM Less Electronic Device Bootup Using Cache
Marvell Asia Pte Ltd
0 cites
US121697192024
Instruction Set Architecture (ISA) Format for Multiple Instruction Set Architectures in Machine Learning Inference Engine
Marvell Asia Pte Ltd
0 cites
US121121742024
Streaming Engine for Machine Learning Architecture
Marvell Asia Pte Ltd
0 cites
US121121752024
Method and Apparatus for Performing Machine Learning Operations in Parallel on Machine Learning Hardware
Marvell Asia Pte Ltd
0 cites
US119949252024
Power Management and Staggering Transitioning from Idle Mode to Operational Mode
Marvell Asia Pte Ltd
0 cites
US119954482024
Method and Apparatus for Performing Machine Learning Operations in Parallel on Machine Learning Hardware
Marvell Asia Pte Ltd
0 cites
US119954632024
Architecture to Support Color Scheme-based Synchronization for Machine Learning
Marvell Asia Pte Ltd
0 cites
US119955692024
Architecture to Support Tanh and Sigmoid Operations for Inference Acceleration in Machine Learning
Marvell Asia Pte Ltd
0 cites
US119779632024
System and Method for INT9 Quantization
Marvell Asia Pte Ltd
0 cites
US119668572024
Architecture to Support Tanh and Sigmoid Operations for Inference Acceleration in Machine Learning
Marvell Asia Pte Ltd
0 cites
US119348632024
Architecture to Support Color Scheme-based Synchronization for Machine Learning
Marvell Asia Pte Ltd
0 cites
US119349652024
Architecture to Support Tanh and Sigmoid Operations for Inference Acceleration in Machine Learning
Marvell Asia Pte Ltd
0 cites
US119279322024
System and Method to Manage Power to a Desired Power Profile
Marvell Asia Pte Ltd
0 cites
US118684752024
System and Methods for Latency Reduction for Fuse Reload Post Reset
Marvell Asia Pte Ltd
0 cites
US118421972023
System and Methods for Tag-based Synchronization of Tasks for Machine Learning Operations
Marvell Asia Pte Ltd
0 cites
US118294922023
System and Method for Hardware-based Register Protection Mechanism
Marvell Asia Pte Ltd
0 cites
US117895132023
Power Management and Current/ramp Detection Mechanism
Marvell Asia Pte Ltd
0 cites
US117346082023
Address Interleaving for Machine Learning
Marvell Asia Pte Ltd
0 cites
US116871362023
System and Method to Manage Power Throttling
Marvell Asia Pte Ltd
0 cites
US116878372023
Architecture to Support Synchronization Between Core and Inference Engine for Machine Learning
Marvell Asia Pte Ltd
0 cites
US116357392023
System and Method to Manage Power to a Desired Power Profile
Marvell Asia Pte Ltd
0 cites
US116219232023
Queueing System with Head-of-line Block Avoidance
Marvell Asia Pte Ltd
0 cites
US116046832023
System and Methods for Tag-based Synchronization of Tasks for Machine Learning Operations
Marvell Asia Pte Ltd
0 cites
US115511482023
System and Method for INT9 Quantization
Marvell Asia Pte Ltd
0 cites