Patents/Inventors

Andrew Brookfield Swaine

SheffieldGB12 patents

15 Patents

US124058982025
Memory Synchronisation Subsequent to a Page Table Walk
Arm Limited
0 cites
US122713202025
Apparatus and Method Using Plurality of Physical Address Spaces
Arm Limited
0 cites
US121644252024
Technique for Tracking Modification of Content of Regions of Memory
Arm Limited
0 cites
US121644362024
Apparatus and Methods for Setting Indicator Data to Indicate Whether a Group of Contiguously Addressed Information Entries in a Selected Address Information Table Provides a Base Address Indicating a Location Within a Contiguously Address Region Comprising Multiple Address Information Tables at a Later Table Level
Arm Limited
0 cites
US120994562024
Command Processing Circuitry Maintaining a Linked List Defining Entries for One or More Command Queues and Executing Synchronization Commands at the Queue Head of the One or More Command Queues in List Order Based on Completion Criteria of the Synchronization Command at the Head of a Given Command Queue
Arm Limited
0 cites
US120672632024
Controlling Memory Access in a Data Processing Systems with Multiple Subsystems
Arm Limited
0 cites
US120560582024
Cache Replacement Control
Arm Limited
0 cites
US119540482024
Variable Nesting Control Parameter for Table Structure Providing Access Control Information for Controlling Access to a Memory System
Arm Limited
0 cites
US119343202024
Translation Lookaside Buffer Invalidation
Arm Limited
0 cites
US118532262023
Address Translation Cache with Use of Page Size Information to Select an Invalidation Lookup Mode, or Use of Leaf-and-intermediate Exclusive Range-specifying Invalidation Request, or Use of Invalidation Request Specifying Single Address and Page Size Information
Arm Limited
0 cites
US117554972023
Memory Management
Arm Limited
0 cites
US117344402023
Memory Access Transaction with Security Check Indication
Arm Limited
0 cites
US116149852023
Insert Operation
Arm Limited
0 cites
US116150222023
Apparatus and Method for Handling Accesses Targeting a Memory
Arm Limited
0 cites
US115865542023
Cache Arrangements for Data Processing Systems
Arm Limited
0 cites