Patents/Inventors

Abhishek Appu

El Dorado Hills, CAUS26 patents

23 Patents

US125612762026
Systems and Methods for Updating Memory Side Caches in a Multi-gpu Configuration
INTEL CORPORATION
0 cites
US125419082026
Apparatus and Method for Throttling a Ray Tracing Pipeline
Intel Corporation
0 cites
US123867792025
Dynamic Memory Reconfiguration
Intel Corporation
0 cites
US123067712025
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US122934312025
Sparse Optimizations for a Matrix Accelerator Architecture
Intel Corporation
0 cites
US122104772025
Systems and Methods for Improving Cache Efficiency and Utilization
Intel Corporation
0 cites
US121982222025
Architecture for Block Sparse Operations on a Systolic Array
Intel Corporation
0 cites
US121820352024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US121410942024
Systolic Disaggregation Within a Matrix Accelerator Architecture
Intel Corporation
0 cites
US121243832024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US120791552024
Graphics Processor Operation Scheduling for Deterministic Latency
Intel Corporation
0 cites
US120560592024
Systems and Methods for Cache Optimization
Intel Corporation
0 cites
US120324962024
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US119950292024
Multi-tile Memory Management for Detecting Cross Tile Access Providing Multi-tile Inference Scaling and Providing Page Migration
Intel Corporation
0 cites
US119540622024
Dynamic Memory Reconfiguration
Intel Corporation
0 cites
US119153572024
Apparatus and Method for Throttling a Ray Tracing Pipeline
Intel Corporation
0 cites
US118424232023
Dot Product Operations on Sparse Matrix Elements
Intel Corporation
0 cites
US117555012023
Efficient Data Sharing for Graphics Data Processing Operations
INTEL CORPORATION
0 cites
US116762392023
Sparse Optimizations for a Matrix Accelerator Architecture
Intel Corporation
0 cites
US116311982023
Targeted Mapping of Graphical Data for Compression
Intel Corporation
0 cites
US116202562023
Systems and Methods for Improving Cache Efficiency and Utilization
Intel Corporation
0 cites
US116155842023
Hierarchical Depth Buffer Back Annotation
Intel Corporation
0 cites
US115803612023
Neural Network Training Mechanism
Intel Corporation
0 cites