Patents/Assignees

TOKYO ELECTRON LIMITED

1,902 patents in portfolio

US12512356utility2025
Apparatus and Method for Wafer Alignment
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US12512354utility2025
Substrate Processing Apparatus and Substrate Processing Method
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US12512345utility2025
Temperature Control Device, Temperature Control Method, and Inspection Apparatus
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US12512344utility2025
Apparatus for Transferring Member to Be Disposed in Substrate Processing Chamber, Substrate Processing System, and Method for Transferring Member
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US12512339utility2025
Temperature Control Device and Substrate Processing Apparatus
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US12512336utility2025
Substrate Processing Method and Substrate Processing Apparatus
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US12507447utility2025
3D Advanced Transistor Architecture Integrated with Source/drain Spider Design
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US12507431utility2025
3D Isolation of a Segmentated 3D Nanosheet Channel Region
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US12507408utility2025
Method and Structures to Reduce Resistivity in Three-dimensional Structures for Microelectronic Workpieces Using Material Deposited in Recesses at Edges of Holes in a Multilayer Stack
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US12506112utility2025
Method for Etching of Metal
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US12506038utility2025
Wafer Bonding Overlay Measurement System
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US12506023utility2025
Opening/closing Apparatus and Transport Chamber
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US12506019utility2025
Wafer Chuck Designs and Methods for Retaining a Processing Liquid on a Surface of a Semiconductor Wafer
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US12506014utility2025
Methods for Non-isothermal Wet Atomic Layer Etching
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US12506012utility2025
Substrate Processing Method and Substrate Processing Apparatus
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US12506011utility2025
Methods for Wet Atomic Layer Etching of Transition Metal Oxide Dielectric Materials
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US12506005utility2025
Methods and Structures for Increasing Stability of Soft or Organic Features
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US12505998utility2025
Method for Chuck Compensation via Wafer Shape Control
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US12505992utility2025
Plasma Processing Apparatus and Cleaning Method
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US12503763utility2025
Substrate Processing Apparatus and Substrate Processing Method
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