- US12369408utility2025ESD Protection Circuit, Semiconductor System Including Same, and Method for Operating Same0 cites
- US12369406utility2025Electrostatic Discharge Protection for Integrated Circuit During Back End-of-line Processing0 cites
- US12369390utility2025Method for Forming Semiconductor Structure with High Aspect Ratio0 cites
- US12369387utility2025Semiconductor Device and Method0 cites
- US12369385utility2025Plural Gate Oxide Structures with Different Thicknesses in Semiconductor Devices0 cites
- US12369384utility2025Semiconductor Device Structure Including Dielectric Region with Plurality of Different Oxidation Regions0 cites
- US12368114utility2025Semiconductor Device Package Having Warpage Control and Method of Forming the Same0 cites
- US12369378utility2025Methods for Doping Semiconductors in Transistors0 cites
- US12369377utility2025Semiconductor Structure and Forming Method Thereof0 cites
- US12369376utility2025Method of Manufacturing a Semiconductor Device and a Semiconductor Device0 cites
- US12369342utility2025Increasing Source/drain Dopant Concentration to Reduced Resistance0 cites
- US12369341utility2025Channel Structures for Semiconductor Devices0 cites
- US12369332utility2025Memory Device for Reducing Thermal Crosstalk0 cites
- US12369329utility2025Bottom-electrode Interface Structure for Memory0 cites
- US12369327utility2025MFM Device with an Enhanced Bottom Electrode0 cites
- US12369325utility2025Gate-last Tri-gate Fefet0 cites
- US12369294utility2025Multi-gate Device and Related Methods0 cites
- US12368442utility2025Low Power Clock Network0 cites
- US12368147utility2025Semiconductor Structure Having Photonic Die and Electronic Die0 cites
- US12368146utility2025Hybrid Integrated Circuit Packages0 cites