- US12310097utility2025Dielectric Protection Layer in Middle-of-line Interconnect Structure Manufacturing Method0 cites
- US12310067utility2025Multigate Device with Stressor Layers and Method of Fabricating Thereof0 cites
- US12310063utility2025Method for Forming Semiconductor Device with Transistors on Opposite Sides of a Dielectric Layer0 cites
- US12310056utility2025Method of Forming Semiconductor Device0 cites
- US12310049utility2025Semiconductor Device Structure with Nanostructure0 cites
- US12310052utility2025Metal Gate with Silicon Sidewall Spacers0 cites
- US12310043utility2025Method of Fabricating a Semiconductor Device0 cites
- US12310038utility2025Method of Making Decoupling Capacitor0 cites
- US12310029utility2025Semiconductor Memory Device and Manufacturing Method Thereof0 cites
- US12310027utility2025Semiconductor Device and Method of Manufacturing the Same0 cites
- US12309990utility2025Data Backup Unit for Static Random-access Memory Device0 cites
- US12308830utility2025Post-driver with Low Voltage Operation and Electrostatic Discharge Protection0 cites
- US12308806utility2025Amplifier Circuit0 cites
- US12308369utility2025Method of Manufacturing a Semiconductor Device and a Semiconductor Device0 cites
- US12308366utility2025Method of Manufacturing Semiconductor Devices and Semiconductor Devices0 cites
- US12308346utility2025Semiconductor Die with Tapered Sidewall in Package0 cites
- US12308343utility2025Semiconductor Device and Method of Forming the Same0 cites
- US12308344utility2025Multi-chip Package Having Stress Relief Structure0 cites
- US12308322utility2025Dual-sided Routing in 3D Semiconductor System-in-package Structure and Methods of Forming the Same0 cites
- US12308323utility2025Package-on-package Device0 cites