- US11709736utility2023Fault Tolerant Memory Systems and Components with Interconnected and Redundant Data Interfaces0 cites
- US11709525utility2023Drift Detection in Timing Signal Forwarded from Memory Controller to Memory Device0 cites
- US11705187utility2023Variable Width Memory Module Supporting Enhanced Error Detection and Correction0 cites
- US11706061utility2023High Speed Signaling System with Adaptive Transmit Pre-emphasis0 cites
- US11706060utility2023Serial-link Receiver Using Time-interleaved Discrete Time Gain0 cites
- US11705903utility2023Back-gate Biasing of Clock Trees Using a Reference Generator0 cites
- US11693801utility2023Stacked Semiconductor Device Assembly in Computer System0 cites
- US11693447utility2023Circuit and Method to Set Delay Between Two Periodic Signals with Unknown Phase Relationship0 cites
- US11687247utility2023High-throughput Low-latency Hybrid Memory Module0 cites
- US11689246utility2023Configurable, Power Supply Voltage Referenced Single-ended Signaling with ESD Protection0 cites
- US11688441utility2023On-die Termination of Address and Command Signals0 cites
- US11681342utility2023Memory Controller with Processor for Generating Interface Adjustment Signals0 cites
- US11683050utility2023Memory Controller and Method of Data Bus Inversion Using an Error Detection Correction Code0 cites
- US11682448utility2023Method and Apparatus for Calibrating Write Timing in a Memory System0 cites
- US11681648utility2023Interface Clock Management0 cites
- US11681632utility2023Techniques for Storing Data and Tags in Different Memory Arrays0 cites
- US11683206utility2023Symbol-rate Phase Detector for Multi-pam Receiver0 cites
- US11683057utility2023PAM-4 DFE Architectures with Symbol-transition Dependent DFE Tap Values0 cites
- US11677571utility2023Backside Security Shield0 cites
- US11675657utility2023Energy-efficient Error-correction-detection Storage0 cites