- US12620994utility2026Fast Calibration of Phase Lock Loops0 cites
- US12603750utility2026Dual Path Clock Forwarding0 cites
- US12483448utility2025Serdes with Robust Parameter Initialization0 cites
- US12470432utility2025Expedited Training for Fast Linkup0 cites
- US12461887utility2025Pcie Retimer with Reduced Power Low Latency Mode0 cites
- US12438567utility2025Serdes Method and Device Having a Protocol-agnostic In-band Management Channel0 cites
- US12401488utility2025Dynamic Timing Loop Gain to Compensate Phase Interpolation Nonlinearities0 cites
- US12261928utility2025Receivers and Method with Fast Sampling Phase and Frequency Acquisition0 cites
- US12105659utility2024Active Cable with Remote End Control Access0 cites
- US12093207utility2024Serial Peripheral Interface with Multi-controller Daisy Chain0 cites
- US12095894utility2024Clock Recovery with Loop Delay Cancellation0 cites
- US12063128utility2024Ethernet Link Extension Method and Device0 cites
- US11942730utility2024Active Redundant Y-cable with Power Sharing0 cites
- US11936505utility2024Decision Feedback Equalization with Efficient Burst Error Correction0 cites
- US11881827utility2024Traveling-wave Transimpedance Amplifier0 cites
- US11855415utility2023High Frequency Signal Coupling to Surface Emitters0 cites
- US11848681utility2023Adaptive Control of Meta-stability Error Bias in Asynchronous Successive Approximation Register ADC0 cites
- US11831473utility2023Reduced-complexity Maximum Likelihood Sequence Detector Suitable for M-ary Signaling0 cites
- US11831475utility2023Receiver Using Pseudo Partial Response Maximum Likelihood Sequence Detection0 cites
- US11789478utility2023Voltage Regulator with Supply Noise Cancellation0 cites
Page 1 of 2Next →