Patents/Assignees

CHANGXIN MEMORY TECHNOLOGIES, Inc.

1,639 patents in portfolio

US12120868utility2024
Semiconductor Device with Buried Bit Line and Preparation Method Thereof
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US12118288utility2024
Method for Configuring Sub Route Flow, Storage Medium, and Equipment
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US12119315utility2024
Chip Bonding Method and Semiconductor Chip Structure
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US12120862utility2024
Semiconductor Structure and Method for Forming Semiconductor Structure
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US12119350utility2024
Semiconductor Structure and Method for Forming Semiconductor Structure
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US12119286utility2024
Die, Memory and Method of Manufacturing Die
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US12119283utility2024
Heat Dissipation Structure, Method for Forming Heat Dissipation Structure, and Semiconductor Structure
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US12119260utility2024
Methods for Manufacturing Semiconductor Structures Including Isolation Layer and Semiconductor Structures Including Isolation Layer
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US12119257utility2024
Floating Pin, Wafer Carrying Device and Depositing Apparatus
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US12119234utility2024
Semiconductor Structure and Method for Manufacturing Same
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US12119226utility2024
Method for Manufacturing Mask Structure, Semiconductor Structure and Manufacturing Method Thereof
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US12119222utility2024
Method for Preparing Semiconductor Structure and Semiconductor Structure
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US12119083utility2024
Drive Circuit, Method for Driving Drive Circuit, and Memory
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US12119078utility2024
Data Processing Circuit and Semiconductor Memory Divided Into Segments
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US12119077utility2024
Circuit for Receiving Data, System for Receiving Data, and Memory Device
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US12119067utility2024
Comparison Circuit and Memory Chip
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US12119045utility2024
Memory Array Layers with Alternating Sense Amplifier Layers
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US12119039utility2024
Refresh Control Circuit and Method, and Memory
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US12119037utility2024
Refresh Circuit, Memory, and Refresh Method
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US12119274utility2024
Latch-up Test Structure
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