Patents/Assignees

ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES Inc.

141 patents in portfolio

US11764189utility2023
Molded Direct Bonded and Interconnected Stack
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US11756880utility2023
Interconnect Structures
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US11749645utility2023
TSV as Pad
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US11742314utility2023
Reliable Hybrid Bonded Apparatus
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US11742315utility2023
Die Processing
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US11735523utility2023
Laterally Unconfined Structure
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US11728273utility2023
Bonded Structure with Interconnect Structure
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US11728287utility2023
Wafer-level Bonding of Obstructive Elements
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US11728313utility2023
Offset Pads Over TSV
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US11721653utility2023
Circuitry for Electrical Redundancy in Bonded Structures
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US11694925utility2023
Diffusion Barrier Collar for Interconnects
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US11670615utility2023
Bonded Structures
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US11664357utility2023
Techniques for Joining Dissimilar Materials in Microelectronics
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US11658173utility2023
Stacked Dies and Methods for Forming Bonded Structures
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US11652083utility2023
Processed Stacked Dies
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US11631586utility2023
Heterogeneous Annealing Method
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US11631647utility2023
Integrated Device Packages with Integrated Device Die and Dummy Element
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US11626363utility2023
Bonded Structures with Integrated Passive Component
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US11610846utility2023
Protective Elements for Bonded Structures Including an Obstructive Element
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US11600542utility2023
Cavity Packages
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