Contact Field for a Motherboard for an Electronic Testing System

FIG. 1 is a top perspective view of a contact field for a motherboard for an electronic testing system;

FIG. 2 is an alternate top perspective view of a contact field for a motherboard for an electronic testing system;

FIG. 3 is a top plan view of a contact field for a motherboard for an electronic testing system;

FIG. 4 is an enlarged top plan view taken from A in FIG. 3 ;

FIG. 5 is an enlarged top plan view taken from B in FIG. 3 ;

FIG. 6 is a bottom plan view of a contact field for a motherboard for an electronic testing system;

FIG. 7 is an enlarged bottom plan view taken from C in FIG. 6 ;

FIG. 8 is an enlarged bottom plan view taken from D in FIG. 6 ;

FIG. 9 is a front elevation view of a contact field for a motherboard for an electronic testing system;

FIG. 10 is a rear elevation view of a contact field for a motherboard for an electronic testing system;

FIG. 11 is a left side elevation view of a contact field for a motherboard for an electronic testing system; and,

FIG. 12 is a right side elevation view of a contact field for a motherboard for an electronic testing system.

The dash-dash broken lines depict the environment and portions of the contact field for a motherboard for an electronic testing system that form no part of the claimed design. The dash-dot-dash broken lines depict the boundaries of the enlargements and form no part of the claimed design.