Integrated Circuit Substrate

FIG. 1 is a top perspective view of an integrated circuit substrate showing our new design;

FIG. 2 is a top plan view thereof;

FIG. 3 is a front elevation view thereof;

FIG. 4 is a rear elevation view thereof;

FIG. 5 is a right side elevation view thereof;

FIG. 6 is a left side elevation view thereof;

FIG. 7 is a bottom plan view thereof; and,

FIG. 8 is another top perspective view thereof, shown in a used condition on a broken line circuit board that includes components attached to the sockets shown in broken lines as environment.

The dashed broken lines in the drawings illustrate portions of the integrated circuit substrate and environment that form no part of the claimed design.